1. Field of the Invention
This invention relates to interconnection circuitry and, more particularly, to improved apparatus for handling data within a computer system in a manner that a plurality of data sources can transfer information to a plurality of destinations concurrently.
2. History of the Prior Art
The typical computer system utilizes a busing arrangement as its primary interconnection to transfer information from one component of the system to another. Such a system usually includes an address and a data bus, each comprising a number of conductors which physically connect to each of the system components such as a central processor and main memory. During the time that any particular source of information is utilizing the buses, the buses are unavailable for use by any other source since the conductors of each bus available to carry either address or data information are occupied. In the past, busing arrangements have sufficed for transferring information in the typical personal computer or work station. However, the requirements for pathways to handle more and more information faster have increased to the point that various functions cannot be performed by the typical busing arrangement.
In order to overcome the limitations of a busing arrangement, various ring interconnection arrangements have been suggested in which each system component is directly connected by one-way connection paths to receive information from one single other system component and to send information to another single system component. Each component forwards information around the ring until the information arrives at its destination. Separating the interconnection into individual paths between components isolates the components from all but two other components but increases the amount of traffic over that which can be handled by a system bus because a number of sources of information can communicate with a number of destinations at the same time.
Most ring-type systems suggested to date have been retry systems where one system component places a packet of information on the ring addressed to another component. If the addressed component cannot handle the incoming information, it places a retry command on the ring causing the operation to be terminated, the transmitted information to be dumped, and the packet to be re-sent after some delay. The retry operation inherently slows the system when the amount of traffic on the system approaches saturation.
In order to overcome the problems of retry ring systems and provide a system capable of transferring much more data than conventional computer arrangements, a new interconnect has been devised which is the subject of U.S. patent applications Ser. No. 07/508,833, entitled RING INTERCONNECT SYSTEM ARCHITECTURE, P. Sweazey, filed Apr. 12, 1990, and assigned to the assignee of this invention; and Ser. No. 530,096, entitled IMPROVED RING INTERCONNECT SYSTEM ARCHITECTURE, P. Sweazey, filed on May. 29, 1990, and assigned to the assignee of this invention. Refer to FIG. 3. This new interconnect in its basic form is made up of a plurality of nodes each such node being associated with at least one of a plurality of computer system components. The nodes are connected in a unidirectional ring in which transmission paths connect each of the nodes to one node which is a source of information and to another node which is a recipient of information.
Each of such nodes includes apparatus for receiving information from and transferring information to the associated one of the system components. When the associated system component desires to transfer information to another system component, it causes the associated node to generate and place a voucher signal on the transmission path to indicate that the node has information to be transmitted to another system component. Each node includes storage space for information and apparatus which responds to the receipt of a voucher signal directed to it as a target node for determining whether the node is able to store information in its storage space. Each node also includes apparatus which responds to a determination that storage space is available by placing a ticket signal to so indicate on the transmission path directed to the node which is to be the source of the information. When a source node receives such a ticket signal, it causes the information packet to be launched on the transmission path. In this manner, no information is propagated on the transmission path until space is available for it at the target node and delays due to information rejection at the target node are eliminated.
Each node also includes circuitry to relay voucher and ticket signals and information which are directed to another node so that information is passed along the transmission path. Moreover, each node includes apparatus for assuring that both voucher and ticket signals are transferred by the node in preference to any information. By this means the transferred information on the transmission path does not get in the way of and delay the signals which control the transmission of that information.
In the improved arrangement, the system is able to select among the different information to be transferred by the various nodes and transmit first that information which is most urgent. In this manner, the system is able to resolve conflicts between different types of information and handle information such as sound and video prior to information which does not have the same real time requirements.
However, situations have been found in which a node of the improved system is incapable of transmitting higher priority information than that being transferred through that node because buffers which hold information being transferred through the node would overflow were the transmission of the lower level information to be interrupted to allow for transmission of the higher level information by the node.